The Appsys ProAudio Flexiverter AUX-TDM Card implements a 64x64 channel Time Division Multiplexing (TDM) interface, operating at 3.3V LVCMOS logic levels. The card features bidirectional data transfer, providing four dedicated data lines for both input and output.
Clocking and control signals are provided via dedicated outputs for Bit Clock (BCLK), Left/Right Clock (LRCLK), Master Clock (MCLK), and a MUTE signal. Input signals include BCLK, LRCLK, and MUTE, in addition to the four data input lines. This configuration facilitates synchronous, parallel data exchange suitable for high-density audio or data acquisition applications.
Operational Modes
The AUX-TDM module integrates within any Flexiverter (FLX) chassis, enabling the following operational modes:
- Standalone conversion: the AUX-TDM facilitates standalone conversion between the Flexiverter's native digital audio format and the TDM interface provided by the module.
- Adding output splits: the module permits the extraction of channel streams from existing Flexiverter conversion processes, providing supplementary output splits via the TDM interface. This functionality enables signal replication and distribution for parallel processing or monitoring.
- Adding protocols and channel counts: in cascaded Flexiverter configurations, such as 'double-Flexiverter' or 'Flexiverter+Multiverter' topologies, the AUX-TDM expands the system's overall channel capacity and supported protocols by introducing the TDM interface. This allows for increased input/output density and protocol bridging.